Towards logical entanglement creation in trivalent planar architectures
arXiv:2607.15044
The paper proposes scalable lattice‑surgery circuits for surface‑code error correction on planar quantum processors where each qubit has only three nearest‑neighbor connections, showing reduced qubit and gate overhead and improved logical fidelity in fluxonium‑based simulations.
Abstract
Low-overhead quantum error-correction schemes are essential for enabling quantum computation on registers containing multiple logical qubits. For planar architectures with limited nearest-neighbor qubit connectivity, the surface code has emerged as the leading paradigm. Recent theoretical and experimental work has shown that a physical-qubit connectivity of degree three is sufficient to implement fault-tolerant quantum error correction. In this work, we study lattice surgery in the context of such trivalent architectures and introduce scalable circuit constructions to implement it. Compared with the four-valent measurement scheme, the trivalent lattice-surgery protocol reduces the required resources by qubits out of a total qubit count of and by two-qubit gates out of a total two-qubit gate count of . We benchmark the logical fidelity of both lattice-surgery schemes in terms of experimentally realistic simulations targeting an implementation with a fluxonium qubit based architecture and find a potential improvement of up to for distance-three. These results open a way for scalable planar trivalent qubit architectures to host a surface-code-based logical quantum processor.