ETH-Hardness of Learning Monotone Circuits and Approximating Their Size

Abstract

We show the following hardness results for monotone learning and approximation of monotone circuit size: 1. Under the Randomised Exponential-Time Hypothesis (rETH), it requires time $n^{\hat{I}\text{c◯}(\log n)}$ to PAC-learn monotone formulas with $n$ input bits and size $s(n)=n$ by monotone circuits of size $n^{(\log n{)}^{1-\hat{I}\mu }}$, for every $\hat{I}\mu >0$. 2. Under the Randomised Exponential-Time Hypothesis (rETH), for any $\hat{I}´>0$, there is a polynomially bounded function $m$ such that $m^{1-\hat{I}´}$-multiplicatively approximating the minimum monotone circuit size of a monotone function consistent with a sequence of $m(n)$ labelled examples $\{(x_i,b_i)\}$ over $n$-bit inputs requires time $m^{\hat{I}\text{c◯}(\log (m))}$. Our results are shown by a novel application of lifting arguments in proof and communication complexity to hardness of monotone learning, by building on the seminal result of Atserias and Müller (J. ACM, 2020) on hardness of automating Resolution proofs.

Topics & keywords