Recursive Clifford noise reduction

Abstract

Clifford noise reduction (CliNR) is a partial error correction scheme that reduces the logical error rate of Clifford circuits at the cost of a modest qubit and gate overhead. The CliNR implementation of an $n$-qubit Clifford circuit of size $s$ achieves a vanishing logical error rate if $sn{p}^2\to 0$ where $p$ is the physical error rate. Here, we propose a recursive version of CliNR that can reduce errors on larger circuits with a relatively small gate overhead. When $np\to 0$, the logical error rate can be vanishingly small. This implementation requires $\left(2\lceil \log (sp)\rceil +3\right)n+1$ qubits and at most $24s\lceil (sp{)}^4\rceil$ gates. Using numerical simulations, we show that the recursive method can offer an advantage in a realistic near-term parameter regime. When circuit sizes are large enough, recursive CliNR can reach a lower logical error rate than the original CliNR with the same gate overhead. The results offer promise for reducing logical errors in large Clifford circuits with relatively small overheads.