StreamTensor: Make Tensors Stream in Dataflow Accelerators for LLMs

Abstract

Efficient execution of deep learning workloads on dataflow architectures is crucial for overcoming memory bottlenecks and maximizing performance. While streaming intermediate results between computation kernels can significantly improve efficiency, existing approaches struggle with inter-kernel correlations, external memory access management, and buffer optimization. In this work, we propose StreamTensor, a compiler framework that automatically constructs and optimizes stream-based dataflow accelerators. StreamTensor introduces a novel iterative tensor type system to explicitly encode stream layouts, enabling seamless kernel fusion, buffer allocation, and memory optimization. By systematically exploring three hierarchical design spaces, including tensor tiling, kernel fusion, and resource allocation, StreamTensor balances computational intensity, memory efficiency, and data streaming to maximize performance. Based on FPGA evaluations on Large Language Models (LLM), StreamTensor achieves up to 0.76x and 0.64x lower latency compared to the state-of-the-art FPGA LLM accelerators and GPUs, and up to 1.99x higher energy efficiency compared to GPUs, making it a promising approach for scalable dataflow-based deep learning acceleration.

Accepted by MICRO'25

References in corpus (7)

• Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inference
• Allo: A Programming Model for Composable Accelerator Design
• Capstan: A Vector RDA for Sparsity
• SambaNova SN40L: Scaling the AI Memory Wall with Dataflow and Composition of Experts
• HIDA: A Hierarchical Dataflow Compiler for High-Level Synthesis
• Stream-HLS: Towards Automatic Dataflow Acceleration
• FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs