FeNN: A RISC-V vector processor for Spiking Neural Network acceleration

Abstract

Spiking Neural Networks (SNNs) have the potential to drastically reduce the energy requirements of AI systems. However, mainstream accelerators like GPUs and TPUs are designed for the high arithmetic intensity of standard ANNs so are not well-suited to SNN simulation. FPGAs are well-suited to applications with low arithmetic intensity as they have high off-chip memory bandwidth and large amounts of on-chip memory. Here, we present a novel RISC-V-based soft vector processor (FeNN), tailored to simulating SNNs on FPGAs. Unlike most dedicated neuromorphic hardware, FeNN is fully programmable and designed to be integrated with applications running on standard computers from the edge to the cloud. We demonstrate that, by using stochastic rounding and saturation, FeNN can achieve high numerical precision with low hardware utilisation and that a single FeNN core can simulate an SNN classifier faster than both an embedded GPU and the Loihi neuromorphic system.

arXiv comment7 pages, 4 figures. Accepted in Proceedings of Neuro Inspired Computational Elements Conference 2025

References in corpus (5)

• The Heidelberg spiking datasets for the systematic evaluation of spiking neural networks
• Event-Based Backpropagation can compute Exact Gradients for Spiking Neural Networks
• Stochastic rounding and reduced-precision fixed-point arithmetic for solving neural ordinary differential equations
• SpiNNaker2: A Large-Scale Neuromorphic System for Event-Based and Asynchronous Machine Learning
• Even Faster SNN Simulation with Lazy+Event-driven Plasticity and Shared Atomics