Planar fault-tolerant circuits for non-Clifford gates on the 2D color code
arXiv:2505.05175 · doi:10.1103/p7c9-x1m9
Abstract
We introduce a family of scalable planar fault-tolerant circuits that implement logical non-Clifford operations on a 2D color code, such as a logical gate or a logical non-Pauli measurement that prepares a magic state. The circuits are relatively simple, consisting only of physical gates, gates, and few-qubit measurements. They can be implemented with an array of qubits on a 2D chip with nearest-neighbor couplings, and no wire crossings. The construction is based on a spacetime path integral representation of a non-Abelian 2+1D topological phase, which is related to the 3D color code. We turn the path integral into a circuit by expressing it as a spacetime tensor network, and then traversing it in some chosen time direction. We describe in detail how fault tolerance is achieved using a "just-in-time" decoding strategy, for which we repurpose and extend state-of-the-art color-code matching decoders.
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