Superconducting non-volatile memory based on charge trapping and gate-controlled supercurrent

Abstract

Superconducting electronics holds great promise for energy-efficient high-performance and quantum computing, yet no superconducting memory has matched the performance of conventional semiconductor memories $-$ a long-standing bottleneck. Here we demonstrate a voltage-controlled, non-volatile superconducting memory that exploits two previously independent effects: gate-controlled supercurrent (GCS), the gate-voltage-induced suppression of the critical current $I_c$ in a superconducting constriction, and charge trapping in an Al${}_2$O${}_3$ dielectric. Trapped charges shift the threshold gate voltage required for $I_c$ suppression, defining two stable, well-separated $I_c$ states that can be used to store binary information. We demonstrate reliable non-destructive readout and reversible write/erase cycling over nearly fifty consecutive cycles with the device remaining in the zero-resistance state throughout. Stored information survives thermal cycling well above the superconducting transition temperature $T_c$, confirming true non-volatility $-$ a capability absent in all existing superconducting memories. We further discuss integration into a NAND architecture and show significant power-dissipation advantages over CMOS charge-trap flash memories.

21 pages, 4 figures