MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space
arXiv:2409.12258 · doi:10.1109/ICECS61496.2024.10848988
Abstract
The emerging need for fast and power-efficient AI/ML deployment on-board spacecraft has forced the space industry to examine specialized accelerators, which have been successfully used in terrestrial applications. Towards this direction, the current work introduces a very heterogeneous co-processing architecture that is built around UltraScale+ MPSoC and its programmable DPU, as well as commercial AI/ML accelerators such as MyriadX VPU and Edge TPU. The proposed architecture, called MPAI, handles networks of different size/complexity and accommodates speed-accuracy-energy trade-offs by exploiting the diversity of accelerators in precision and computational power. This brief provides technical background and reports preliminary experimental results and outcomes.
Accepted for publication at the 31st IEEE ICECS Conference, 18-20 Nov, 2024, Nancy, France