paper

FPGA Implementation of Multi-Layer Machine Learning Equalizer with On-Chip Training

arXiv:2212.03515

Abstract

We design and implement an adaptive machine learning equalizer that alternates multiple linear and nonlinear computational layers on an FPGA. On-chip training via gradient backpropagation is shown to allow for real-time adaptation to time-varying channel impairments.

To be presented at the 2023 Optical Fiber Communication Conference (OFC)