Hardware-Conscious Optimization of the Quantum Toffoli Gate

Abstract

While quantum computing holds great potential in combinatorial optimization, electronic structure calculation, and number theory, the current era of quantum computing is limited by noisy hardware. Many quantum compilation approaches can mitigate the effects of imperfect hardware by optimizing quantum circuits for objectives such as critical path length. Few approaches consider quantum circuits in terms of the set of vendor-calibrated operations (i.e., native gates) available on target hardware. This manuscript expands the analytical and numerical approaches for optimizing quantum circuits at this abstraction level. We present a procedure for combining the strengths of analytical native gate-level optimization with numerical optimization. Although we focus on optimizing Toffoli gates on the IBMQ native gate set, the methods presented are generalizable to any gate and superconducting qubit architecture. Our optimized Toffoli gate implementation demonstrates an $18\%$ reduction in infidelity compared with the canonical implementation as benchmarked on IBM Jakarta with quantum process tomography. Assuming the inclusion of multi-qubit cross-resonance (MCR) gates in the IBMQ native gate set, we produce Toffoli implementations with only six multi-qubit gates, a $25\%$ reduction from the canonical eight multi-qubit implementations for linearly connected qubits.

References in corpus (28)

• SciPy 1.0--Fundamental Algorithms for Scientific Computing in Python
• Supplementary information for "Quantum supremacy using a programmable superconducting processor"
• Polynomial-Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer
• Elementary gates for quantum computation
• Logic gates at the surface code threshold: Superconducting qubits poised for fault-tolerant quantum computing
• From the Quantum Approximate Optimization Algorithm to a Quantum Alternating Operator Ansatz
• Parallel implementation of high-fidelity multi-qubit gates with neutral atoms
• Realization of Three-Qubit Quantum Error Correction with Superconducting Circuits
• Efficient Z-Gates for Quantum Computing
• Benchmarking an 11-qubit quantum computer
• Fast universal quantum control above the fault-tolerance threshold in silicon
• Procedure for systematically tuning up crosstalk in the cross resonance gate
• Fidelity benchmarks for two-qubit gates in silicon
• Software Mitigation of Crosstalk on Noisy Intermediate-Scale Quantum Computers
• High fidelity quantum gates via dynamical decoupling
• Reducing unitary and spectator errors in cross resonance with optimized rotary echoes
• Compiling quantum circuits to realistic hardware architectures using temporal planners
• Speedup for quantum optimal control from automatic differentiation based on graphics processing units
• Timing and resource-aware mapping of quantum circuits to superconducting processors
• On the qubit routing problem
• ADAPT: Mitigating Idling Errors in Qubits via Adaptive Dynamical Decoupling
• Partial Compilation of Variational Algorithms for Noisy Intermediate-Scale Quantum Machines
• Improved error thresholds for measurement-free error correction
• LEAP: Scaling Numerical Optimization Based Synthesis Using an Incremental Approach
• Hidden Inverses: Coherent Error Cancellation at the Circuit Level
• Optimal Qubit Mapping with Simultaneous Gate Absorption
• Orchestrated Trios: Compiling for Efficient Communication in Quantum Programs with 3-Qubit Gates
• Pulse-engineered Controlled-V gate and its applications on superconducting quantum device

Cited by in corpus (7)

• Shallow unitary decompositions of quantum Fredkin and Toffoli gates for connectivity-aware equivalent circuit averaging
• A Toffoli Gate Decomposition via Echoed Cross-Resonance Gates
• QContext: Context-Aware Decomposition for Quantum Gates
• MIRAGE: Quantum Circuit Decomposition and Routing Collaborative Design using Mirror Gates
• Resilience-Runtime Tradeoff Relations for Quantum Algorithms
• Noise-Aware Circuit Compilations for a Continuously Parameterized Two-Qubit Gateset
• A T-depth two Toffoli gate for 2D square lattice architectures