Simulation of the five-qubit quantum error correction code on superconducting qubits
arXiv:2107.06491 · doi:10.1103/PhysRevA.105.032409
Abstract
Experimental realization of stabilizer-based quantum error correction (QEC) codes that would yield superior logical qubit performance is one of the formidable task for state-of-the-art quantum processors. A major obstacle towards realizing this goal is the large footprint of QEC codes, even those with a small distance. We propose a circuit based on the minimal distance-3 QEC code, which requires only 5 data qubits and 5 ancilla qubits, connected in a ring with iSWAP gates implemented between neighboring qubits. Using a density-matrix simulation, we show that, thanks to its smaller footprint, the proposed code has a lower logical error rate than Surface-17 for similar physical error rates. We also estimate the performance of a neural network-based error decoder, which can be trained to accommodate the error statistics of a specific quantum processor by training on experimental data.
11 pages, 8 figures, 5 tables
References in corpus (11)
- Surface codes: Towards practical large-scale quantum computation
- Topological Quantum Distillation
- Detecting arbitrary quantum errors via stabilizer measurements on a sublattice of the surface code
- Exponential suppression of bit or phase flip errors with repetitive error correction
- Low-distance Surface Codes under Realistic Quantum Noise
- Topological Computation without Braiding
- Logical-qubit operations in an error-detecting surface code
- Observation of classical-quantum crossover of 1/f flux noise and its paramagnetic temperature dependence
- Surface code with decoherence: An analysis of three superconducting architectures
- Benchmarking the noise sensitivity of different parametric two-qubit gates in a single superconducting quantum computing platform
- A Scalable Decoder Micro-architecture for Fault-Tolerant Quantum Computing