Optimizing Stabilizer Parities for Improved Logical Qubit Memories

Abstract

We study variants of Shor's code that are adept at handling single-axis correlated idling errors, which are commonly observed in many quantum systems. By using the repetition code structure of the Shor's code basis states, we calculate the logical channel applied to the encoded information when subjected to coherent and correlated single qubit idling errors, followed by stabilizer measurement. Changing the signs of the stabilizer generators allows us to change how the coherent errors interfere, leading to a quantum error correcting code which performs as well as a classical repetition code of equivalent distance against these errors. We demonstrate a factor of 4 improvement of the logical memory in a distance-3 logical qubit implemented on a trapped-ion quantum computer. Even-distance versions of our Shor code variants are decoherence-free subspaces and fully robust to identical and independent coherent idling noise.

References in corpus (4)

• Exponential suppression of bit or phase flip errors with repetitive error correction
• Arbitrarily accurate composite pulses
• Robust Ising Gates for Practical Quantum Computation
• Demonstration of Shor encoding on a trapped-ion quantum computer

Cited by in corpus (6)

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• Logical Error Rates for the Surface Code Under a Mixed Coherent and Stochastic Circuit-Level Noise Model Inspired by Trapped Ions
• Thermal masses and trapped-ion quantum spin models: a self-consistent approach to Yukawa-type interactions in the $\lambda {\varphi }^4$ model