Demonstrating NISQ Era Challenges in Algorithm Design on IBM's 20 Qubit Quantum Computer

Abstract

As superconducting qubits continue to advance technologically, the realization of quantum algorithms from theoretical abstraction to physical implementation requires knowledge of both quantum circuit construction as well as hardware limitations. In this study we present results from experiments run on IBM's 20-qubit `Poughkeepsie' architecture, with the goal of demonstrating various qubit qualities and challenges that arise in designing quantum algorithms. These include experimentally measuring $T_1$ and $T_2$ coherence times, gate fidelities, sequential CNOT gates, techniques for handling ancilla qubits, and finally CCNOT and QFT${}^{†}$ circuits implemented on several different qubit geometries. Our results demonstrate various techniques for improving quantum circuits which must compensate for limited connectivity, either through the use of SWAP gates or additional ancilla qubits.

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• Application-Oriented Performance Benchmarks for Quantum Computing
• Benchmarking simulated and physical quantum processing units using quantum and hybrid algorithms
• Quantum Circuit Engineering for Correcting Coherent Noise
• Integration of spectator qubits into quantum computer architectures for hardware tuneup and calibration
• Low-depth simulations of fermionic systems on square-grid quantum hardware
• Continuous-time dynamics and error scaling of noisy highly-entangling quantum circuits
• Analogue Quantum Simulation with Fixed-Frequency Transmon Qubits
• Surpassing spectator qubits with photonic modes and continuous measurement for Heisenberg-limited noise mitigation