Decoding Staircase Codes with Marked Bits

Abstract

Staircase codes (SCCs) are typically decoded using iterative bounded-distance decoding (BDD) and hard decisions. In this paper, a novel decoding algorithm is proposed, which partially uses soft information from the channel. The proposed algorithm is based on marking certain number of highly reliable and highly unreliable bits. These marked bits are used to improve the miscorrection-detection capability of the SCC decoder and the error-correcting capability of BDD. For SCCs with $2$-error-correcting BCH component codes, our algorithm improves upon standard SCC decoding by up to $0.30$~dB at a bit-error rate of $10^{-7}$. The proposed algorithm is shown to achieve almost half of the gain achievable by an idealized decoder with this structure.

arXiv commentAccepted by ISTC2018

References in corpus (2)

• Staircase Codes: FEC for 100 Gb/s OTN
• Iterative Bounded Distance Decoding of Product Codes with Scaled Reliability

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• 30% Reach Increase via Low-complexity Hybrid HD/SD FEC and Nonlinearity-tolerant 4D Modulation
• Improving HD-FEC decoding via bit marking
• On Parameter Optimization and Reach Enhancement for the Improved Soft-Aided Staircase Decoder