Adding 32-bit Mode to the ACL2 Model of the x86 ISA
arXiv:1810.04313 · doi:10.4204/EPTCS.280.6
Abstract
The ACL2 model of the x86 Instruction Set Architecture was built for the 64-bit mode of operation of the processor. This paper reports on our work to extend the model with support for 32-bit mode, recounting the salient aspects of this activity and identifying the ones that required the most work.
In Proceedings ACL2 2018, arXiv:1810.03762