A Systematic Approach to Blocking Convolutional Neural Networks

Abstract

Convolutional Neural Networks (CNNs) are the state of the art solution for many computer vision problems, and many researchers have explored optimized implementations. Most implementations heuristically block the computation to deal with the large data sizes and high data reuse of CNNs. This paper explores how to block CNN computations for memory locality by creating an analytical model for CNN-like loop nests. Using this model we automatically derive optimized blockings for common networks that improve the energy efficiency of custom hardware implementations by up to an order of magnitude. Compared to traditional CNN CPU implementations based on highly-tuned, hand-optimized BLAS libraries,our x86 programs implementing the optimal blocking reduce the number of memory accesses by up to 90%.

References in corpus (4)

• Very Deep Convolutional Networks for Large-Scale Image Recognition
• Caffe: Convolutional Architecture for Fast Feature Embedding
• maxDNN: An Efficient Convolution Kernel for Deep Learning with Maxwell GPUs
• Caffe con Troll: Shallow Ideas to Speed Up Deep Learning

Cited by in corpus (13)

• Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators
• Hardware and Software Optimizations for Accelerating Deep Neural Networks: Survey of Current Trends, Challenges, and the Road Ahead
• Supporting Very Large Models using Automatic Dataflow Graph Partitioning
• Restructuring Batch Normalization to Accelerate CNN Training
• HW-NAS-Bench:Hardware-Aware Neural Architecture Search Benchmark
• Optimally Scheduling CNN Convolutions for Efficient Memory Access
• Marvel: A Data-centric Compiler for DNN Operators on Spatial Accelerators
• DNA: Differentiable Network-Accelerator Co-Search
• Improving Memory Utilization in Convolutional Neural Network Accelerators
• Partitioning Compute Units in CNN Acceleration for Statistical Memory Traffic Shaping
• Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators
• Communication Lower Bound in Convolution Accelerators
• AccSS3D: Accelerator for Spatially Sparse 3D DNNs