Quantum circuit optimization by topological compaction in the surface code

Abstract

The fragile nature of quantum information limits our ability to construct large quantities of quantum bits suitable for quantum computing. An important goal, therefore, is to minimize the amount of resources required to implement quantum algorithms, many of which are serial in nature and leave large numbers of qubits idle much of the time unless compression techniques are used. Furthermore, quantum error-correcting codes, which are required to reduce the effects of noise, introduce additional resource overhead. We consider a strategy for quantum circuit optimization based on topological deformation in the surface code, one of the best performing and most practical quantum error-correcting codes. Specifically, we examine the problem of minimizing computation time on a two-dimensional qubit lattice of arbitrary, but fixed dimension, and propose two algorithms for doing so.

26 pages, 14 figures

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Cited by in corpus (9)

• The Future of Quantum Computing with Superconducting Qubits
• Fault-Tolerant High Level Quantum Circuits: Form, Compilation and Description
• Optimized Surface Code Communication in Superconducting Quantum Computers
• Noise-Adaptive Compiler Mappings for Noisy Intermediate-Scale Quantum Computers
• Logic Synthesis for Fault-Tolerant Quantum Computers
• A Regular Representation of Quantum Circuits
• Hardness of braided quantum circuit optimization in the surface code
• Resource optimization for fault-tolerant quantum computing
• Programming quantum computers using 3-D puzzles, coffee cups, and doughnuts