Chaotic multi-objective optimization based design of fractional order PIλDμ controller in AVR system
arXiv:1205.1765 · doi:10.1016/j.ijepes.2012.06.034
Abstract
In this paper, a fractional order (FO) PIλDμcontroller is designed to take care of various contradictory objective functions for an Automatic Voltage Regulator (AVR) system. An improved evolutionary Non-dominated Sorting Genetic Algorithm II (NSGA II), which is augmented with a chaotic map for greater effectiveness, is used for the multi-objective optimization problem. The Pareto fronts showing the trade-off between different design criteria are obtained for the PIλDμand PID controller. A comparative analysis is done with respect to the standard PID controller to demonstrate the merits and demerits of the fractional order PIλDμcontroller.
30 pages, 14 figures