16 citations
Counting papers with at most 25 authors, so collaboration author lists do not stand in for the people here.
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cs.AR2018★ 1 cited
Data-Dependent Clock Gating approach for Low Power Sequential System
Dhiraj Sarkar, Pritam Bhattacharjee, Alak Majumder
Power dissipation in the sequential systems of modern CPU integrated chips (CPU-IC viz., Silicon Chip) is in discussion since the last decade. Researchers have been cultivating man…
cs.AR2018★ 4 cited
LECTOR Based Clock Gating for Low Power Multi-Stage Flip Flop Applications
Pritam Bhattacharjee, Bipasha Nath, Alak Majumder
Power dissipation in integrated circuits is one of the major concerns to the research community, at the verge when more number of transistors are integrated on a single chip. The s…