244 citations
- École Polytechnique Fédérale de LausanneCH4 papers
- Microsoft Research (United Kingdom)GB3 papers
- University of HelsinkiFI3 papers
- Arizona State UniversityUS2 papers
- Carnegie Institution for ScienceUS2 papers
- Carnegie Mellon UniversityUS2 papers
- Carnegie ObservatoriesUS2 papers
- Charles UniversityCZ2 papers
- Eindhoven University of TechnologyNL2 papers
- ETH ZurichCH2 papers
- Georgia Institute of TechnologyUS2 papers
- Google (United States)US2 papers
5 papers · 1 filter
Avoiding Scalability Collapse by Restricting Concurrency
Dave Dice, Alex Kogan
Saturated locks often degrade the performance of a multithreaded application, leading to a so-called scalability collapse problem. This problem arises when a growing number of thre…
Compact NUMA-Aware Locks
Dave Dice, Alex Kogan
Modern multi-socket architectures exhibit non-uniform memory access (NUMA) behavior, where access by a core to data cached locally on a socket is much faster than access to data ca…
TWA -- Ticket Locks Augmented with a Waiting Array
Dave Dice, Alex Kogan
The classic ticket lock consists of ticket and grant fields. Arriving threads atomically fetch-and-increment ticket and then wait for grant to become equal to the value returned by…
BRAVO -- Biased Locking for Reader-Writer Locks
David Dice, Alex Kogan
Designers of modern reader-writer locks confront a difficult trade-off related to reader scalability. Locks that have a compact memory representation for active readers will typica…
The Influence of Malloc Placement on TSX Hardware Transactional Memory
Dave Dice, Tim Harris, Alex Kogan +1
The hardware transactional memory (HTM) implementation in Intel's i7-4770 "Haswell" processor tracks the transactional read-set in the L1 (level-1), L2 (level-2) and L3 (level-3) c…