CellE: Automated Standard Cell Library Extension via Equality Saturation

Yi Ren, Yukun Wang, Xiang Meng +6

Kimi K3: Open Frontier Intelligence

Kimi Team, Tongtong Bai, Yifan Bai +398

DiffuSE: Cross-Layer Design Space Exploration of DNN Accelerator via Diffusion-Driven Optimization

Yi Ren, Chenhao Xue, Jiaxing Zhang +5

Concurrent CPU-GPU Task Programming using Modern C++

Tsung-Wei Huang, Yibo Lin

From Flip FET to Flip 3D Integration (F3D): Maximizing the Scaling Potential of Wafer Both Sides Beyond Conventional 3D Integration

Heng Wu, Haoran Lu, Wanyue Peng +13

PANDA: An LLM-Enhanced Performance-Driven Analog Design Framework Bridging Design Intent and Layout Generation

Haoyi Zhang, Weijian Fan, Xiaohan Gao +3

Multi-Electrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization

Jing Mai, Jiarui Wang, Zhixiong Di +1

CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)

Zhuomin Chai, Yuxiang Zhao, Yibo Lin +3

LEAPS: Topological-Layout-Adaptable Multi-Die FPGA Placement for Super Long Line Minimization

Zhixiong Di, Runzhe Tao, Jing Mai +2

A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis

Xun Jiang, Haoran Lu, Yuxuan Zhao +8

GAP-LA: GPU-Accelerated Performance-Driven Layer Assignment

Chunyuan Zhao, Zizheng Guo, Zuodong Zhang +1

OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit

Jing Mai, Jiarui Wang, Zhixiong Di +3

Data Efficient Lithography Modeling with Transfer Learning and Active Data Selection

Yibo Lin, Meng Li, Yuki Watanabe +4

PDNNet: PDN-Aware GNN-CNN Heterogeneous Network for Dynamic IR Drop Prediction

Yuxiang Zhao, Zhuomin Chai, Xun Jiang +3

Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System

Tsung-Wei Huang, Dian-Lun Lin, Chun-Xun Lin +1

RePart: Efficient Hypergraph Partitioning with Logic Replication Optimization for Multi-FPGA System

Zizhuo Fu, Yifan Zhou, Zhaoxin Lu +4

SEGA-DCIM: Design Space Exploration-Guided Automatic Digital CIM Compiler with Multiple Precision Support

Haikang Diao, Haoyi Zhang, Jiahao Song +5

DataPrep-Bench: Benchmarking LLMs as Training Data Preparators

Hao Liang, Qifeng Cai, Yibo Lin +11

MuGrid-v2: A novel scintillator detector for multidisciplinary applications

Tao Yu, Yunsong Ning, Yi Yuan +13

HybridNet: Dual-Branch Fusion of Geometrical and Topological Views for VLSI Congestion Prediction

Yuxiang Zhao, Zhuomin Chai, Yibo Lin +2

Theseus: Exploring Efficient Wafer-Scale Chip Design for Large Language Models

Jingchen Zhu, Chenhao Xue, Yiqi Chen +13

Analytical Heterogeneous Die-to-Die 3D Placement with Macros

Yuxuan Zhao, Peiyu Liao, Siting Liu +3

LHNN: Lattice Hypergraph Neural Network for VLSI Congestion Prediction

Bowen Wang, Guibao Shen, Dong Li +7

DiagramNet: An End-to-End Recognition Framework and Dataset for Non-Standard System-Level Diagrams

Jincheng Lou, Ruohan Xu, Jiapeng Li +6

MORE-Stress: Model Order Reduction based Efficient Numerical Algorithm for Thermal Stress Simulation of TSV Arrays in 2.5D/3D IC

Tianxiang Zhu, Qipan Wang, Yibo Lin +2

AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models

Chenhao Xue, Kezhi Li, Jiaxing Zhang +7

The Dawn of AI-Native EDA: Opportunities and Challenges of Large Circuit Models

Lei Chen, Yiqi Chen, Zhufei Chu +36

ATSim3D: Towards Accurate Thermal Simulator for Heterogeneous 3D-IC Systems Considering Nonlinear Leakage and Conductivity

Qipan Wang, Tianxiang Zhu, Yibo Lin +2

ATSim3.5D: A Multiscale Thermal Simulator for 3.5D-IC Systems based on Nonlinear Multigrid Method

Qipan Wang, Tianxiang Zhu, Yibo Lin +2

LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design

Bingyang Liu, Haoyi Zhang, Xiaohan Gao +5

READ: Reliability-Enhanced Accelerator Dataflow Optimization using Critical Input Pattern Reduction

Zuodong Zhang, Renjie Wei, Meng Li +3

A Tale of Two Sides of Wafer: Physical Implementation and Block-Level PPA on Flip FET with Dual-sided Signals

Haoran Lu, Xun Jiang, Yanbang Chu +7

Evolution of Optimization Algorithms for Global Placement via Large Language Models

Xufeng Yao, Jiaxi Jiang, Yuxuan Zhao +3

FusionCell: Cross-Attentive Fusion of Layout Geometry and Netlist Topology for Standard-Cell Performance Prediction

Haoyi Zhang, Kairong Guo, Bojie Zhang +2

GoGoTB: Agentic RTL Verification with Specification-Grounded Coverage Closure

Xin Xin, Jincheng Lou, Junhui Li +11

GoGoTB is an agentic framework that uses large language models to automatically generate complete verification environments for RTL designs and achieve specification‑grounded cover…

Imbalanced Large Graph Learning Framework for FPGA Logic Elements Packing Prediction

Zhixiong Di, Runzhe Tao, Lin Chen +2

HeteroSTA: A CPU-GPU Heterogeneous Static Timing Analysis Engine with Holistic Industrial Design Support

Zizheng Guo, Haichuan Liu, Xizhe Shi +5

ATMPlace: Analytical Thermo-Mechanical-Aware Placement Framework for 2.5D-IC

Qipan Wang, Tianxiang Zhu, Tianyu Jia +3

AttentionCap: Transformer Based Capacitance Matrix Learning Toward Full-Chip Extraction

Jiechen Huang, Hector R. Rodriguez, Dingcheng Yang +3

DOMAC: Differentiable Optimization for High-Speed Multipliers and Multiply-Accumulators

Chenhao Xue, Yi Ren, Jinwei Zhou +6

LEGO: An LLM Skill-Based Front-End Design Generation Platform

Jincheng Lou, Ruohan Xu, Jiecheng Ma +3

Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++

Cheng-Hsiang Chiu, Tsung-Wei Huang, Zizheng Guo +1

Design Optimization of Flip FET Standard Cells with Dual-sided Pins for Ultimate Scaling

Rui Gui, Haoran Lu, Jiacheng Sun +7

Orthrus: Dual-Loop Automated Framework for System-Technology Co-Optimization

Yi Ren, Baokang Peng, Chenhao Xue +6

Analytical Die-to-Die 3D Placement with Bistratal Wirelength Model and GPU Acceleration

Peiyu Liao, Yuxuan Zhao, Dawei Guo +2

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

Haoyi Zhang, Shizhao Sun, Yibo Lin +2

LaMoSys3.5D: Enabling 3.5D-IC-Based Large Language Model Inference Serving Systems via Hardware/Software Co-Design

Qipan Wang, Zhe Zhang, Shuangchen Li +5

MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs

Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen +19

OpenMPL: An Open Source Layout Decomposer

Wei Li, Yuzhe Ma, Qi Sun +4

Post-Layout Simulation Driven Analog Circuit Sizing

Xiaohan Gao, Haoyi Zhang, Siyuan Ye +6

Towards a Theoretical Understanding of Hashing-Based Neural Nets

Yibo Lin, Zhao Song, Lin F. Yang

EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration

Haoyi Zhang, Jiahao Song, Xiaohan Gao +4

Learning Long Term Dependencies via Fourier Recurrent Units

Jiong Zhang, Yibo Lin, Zhao Song +1

Towards Machine Learning for Placement and Routing in Chip Design: a Methodological Overview

Junchi Yan, Xianglong Lyu, Ruoyu Cheng +1