Publications (9)
HIKE, High Intensity Kaon Experiments at the CERN SPS
E. Cortina Gil, J. Jerhot, N. Lurkin +176
A timely and long-term programme of kaon decay measurements at a new level of precision is presented, leveraging the capabilities of the CERN Super Proton Synchrotron (SPS). The pr…
GPU-based Real-time Triggering in the NA62 Experiment
R. Ammendola, A. Biagioni, P. Cretaro +17
Over the last few years the GPGPU (General-Purpose computing on Graphics Processing Units) paradigm represented a remarkable development in the world of computing. Computing for Hi…
High-speed data transfer with FPGAs and QSFP+ modules
R. Ammendola, A. Biagioni, G. Chiodi +11
We present test results and characterization of a data transmission system based on a last generation FPGA and a commercial QSFP+ (Quad Small Form Pluggable +) module. QSFP+ standa…
Progress report on the online processing upgrade at the NA62 experiment
M. Turisini, R. Ammendola, A. Biagioni +10
A new FPGA-based low-level trigger processor has been installed at the NA62 experiment. It is intended to extend the features of its predecessor due to a faster interconnection tec…
Architectural improvements and technological enhancements for the APEnet+ interconnect system
R. Ammendola, A. Biagioni, O. Frezza +9
The APEnet+ board delivers a point-to-point, low-latency, 3D torus network interface card. In this paper we describe the latest generation of APEnet NIC, APEnet v5, integrated in a…
Radiation tolerance tests on key components of the ePIC-dRICH readout card
S. Geminiani, B. R. Achari, N. Agrawal +60
The dual-radiator RICH (dRICH) detector of the ePIC experiment will employ over 300000 SiPM pixels as photosensors, organized into more than 1000 Photon Detection Units. Each PDU i…
ePIC Early Science Report
D. Abbott, N. Abdelrahman, S. Abhijit +781
This Early Science Report from the ePIC Collaboration outlines the compelling physics program achievable during the first years of operation of the Electron-Ion Collider (EIC), pri…
NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
R. Ammendola, A. Biagioni, O. Frezza +10
NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack pr…
NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface Card with GPUDirect Features
A. Lonardo, F. Ameli, R. Ammendola +14
While the GPGPU paradigm is widely recognized as an effective approach to high performance computing, its adoption in low-latency, real-time systems is still in its early stages. A…