Publications (5)
Chiplet3D: Pin- and Thermal-Aware 3D Chiplet Floorplanning via Convolution-Embedded MILP
Shuo Ren, Libo Shen, Yaohui Han +4
As traditional Moore's Law scaling slows down, 3D-ICs stack multiple active dies vertically to sustain performance scaling. However, this vertical stacking traps heat inside, makin…
CLIP-3D: Closed-Loop Evaluation of Performance and Physical Constraints for 3D ICs
Shuo Ren, Libo Shen, Yaohui Han +6
The paper introduces CLIP-3D, a methodology that integrates power, cache, and thermal models with architectural simulation to evaluate the performance and physical constraints of 3…
AutoLPBench: An Auto-Generated, Agent-Friendly LP Benchmark via Inverse-KKT Construction
Shuo Ren, Yaohui Han, Yifan Shi +6
Most LP-from-text benchmarks are static datasets of word problems written and labeled by hand. Once such a dataset is released, its size is fixed, its difficulty is fixed, and ever…
AgenticECO: An Agentic Framework for ECO on 3D Integrated Circuits
Shuo Ren, Yaohui Han, Libo Shen +4
As Moore's law slows, the industry is turning to three-dimensional integration; yet in merged 3D-IC flows, routed designs expose bond-level defects with no 2D analogue, and post-ro…
AgenticPD: A Stage-Aware Agentic Framework for Physical Design QoR Optimization
Shuo Ren, Zijin Cheng, Yaohui Han +7
Physical design quality-of-results~(QoR) optimization is hard and expensive. Choices made at one stage can help or hurt later stages. Each evaluation requires a costly EDA run thro…