Publications (69)
MEC: An Open-source Fine-grained Mapping Equivalence Checking Tool for FPGA
Liwei Ni, Zonglin Yang, Jiaxi Zhang +6
Realtime-VLA FLASH: Speculative Inference Framework for Diffusion-based VLAs
Jiahui Niu, Kefan Gu, Yucheng Zhao +5
DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs
Mingkai Chen, Tianhua Han, Cheng Liu +8
Rtl2lean: Automated RTL-to-Lean Translation with Hierarchical Theorem Generation and Lemma Reuse
Hongqin Lyu, Junxing Dong, Yonghao Wang +3
BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction
Liwei Ni, Jiaxi Zhang, Shenggen Zheng +5
LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow
Kaiyan Chang, Wenlong Zhu, Shengwen Liang +2
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework
Kaiyan Chang, Kun Wang, Nan Yang +16
ANNS-AMP: Accelerating Approximate Nearest Neighbor Search via Adaptive Mixed-Precision Computing
Mingkai Chen, Cheng Liu, Shengwen Liang +3
MCU-MixQ: A HW/SW Co-optimized Mixed-precision Neural Network Design Framework for MCUs
Junfeng Gong, Cheng Liu, Long Cheng +2
Think with Self-Decoupling and Self-Verification: Automated RTL Design with Backtrack-ToT
Zhiteng Chao, Yonghao Wang, Xinyu Zhang +9
Understanding and Mitigating Errors of LLM-Generated RTL Code
Jiazheng Zhang, Cheng Liu, Long Cheng +2
AssertMiner: Module-Level Spec Generation and Assertion Mining using Static Analysis Guided LLMs
Hongqin Lyu, Yonghao Wang, Jiaxin Zhou +3
A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs
Peng Dang, Huawei Li, Wei Wang
ChipSeek: Optimizing Verilog Generation via EDA-Integrated Reinforcement Learning
Zhirong Chen, Kaiyan Chang, Zhuolin Li +8
Cross-Layer Optimization for Fault-Tolerant Deep Learning
Qing Zhang, Cheng Liu, Bo Liu +4
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation
Kaiyan Chang, Zhirong Chen, Yunhao Zhou +9
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks
Shengwen Liang, Ying Wang, Cheng Liu +3
ChipGPT: How far are we from natural language hardware design
Kaiyan Chang, Ying Wang, Haimeng Ren +5
iEDA: An Open-Source Intelligent Physical Implementation Toolkit and Library
Xingquan Li, Simin Tao, Zengrong Huang +53
ParaGate: Parasitic-Driven Domain Adaptation Transfer Learning for Netlist Performance Prediction
Bin Sun, Jingyi Zhou, Jianan Mu +5
Iterative LLM-Based Assertion Generation Using Syntax-Semantic Representations for Functional Coverage-Guided Verification
Yonghao Wang, Jiaxin Zhou, Yang Yin +6
Analysis of LLM Vulnerability to GPU Soft Errors: An Instruction-Level Fault Injection Study
Duo Chai, Zizhen Liu, Shuhuai Wang +4
IICPilot: An Intelligent Integrated Circuit Backend Design Framework Using Open EDA
Zesong Jiang, Qing Zhang, Cheng Liu +3
Energy-Efficient Accelerator Design for Deformable Convolution Networks
Dawen Xu, Cheng Chu, Cheng Liu +4
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs
Erjing Luo, Haitong Huang, Cheng Liu +5
FT-Pilot: Automated Fault-Tolerant RTL Rewriting via Vulnerability-Guided LLMs
Weixing Liu, Zizhen Liu, Jing Ye +4
MRFI: An Open Source Multi-Resolution Fault Injection Framework for Neural Network Processing
Haitong Huang, Cheng Liu, Bo Liu +3
R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors
Dawen Xu, Meng He, Cheng Liu +5
HTDet: A Clustering Method using Information Entropy for Hardware Trojan Detection
Renjie Lu, Haihua Shen, Feng Zhang +3
Fault-Tolerant Deep Learning: A Hierarchical Perspective
Cheng Liu, Zhen Gao, Siting Liu +3
VeriPilot: An LLM-Powered Verilog Debugging Framework
Yihan Wang, Cheng Liu, Jiazheng Zhang +4
Extend IVerilog to Support Batch RTL Fault Simulation
Jiaping Tang, Jianan Mu, Zizhen Liu +3
SASH: Efficient Secure Aggregation Based on SHPRG For Federated Learning
Zizhen Liu, Si Chen, Jing Ye +3
Large Processor Chip Model
Kaiyan Chang, Mingzhi Chen, Yunji Chen +40
Exploring Winograd Convolution for Cost-effective Neural Network Fault Tolerance
Xinghua Xue, Cheng Liu, Bo Liu +6
HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning
Cheng Liu, Cheng Chu, Dawen Xu +5
Boolean-aware Boolean Circuit Classification: A Comprehensive Study on Graph Neural Network
Liwei Ni, Xinquan Li, Biwei Xie +1
From Indiscriminate to Targeted: Efficient RTL Verification via Functionally Key Signal-Driven LLM Assertion Generation
Yonghao Wang, Hongqin Lyu, Boling Chen +8
RTLSeek: Boosting the LLM-Based RTL Generation with Multi-Stage Diversity-Oriented Reinforcement Learning
Xinyu Zhang, Zhiteng Chao, Yonghao Wang +6
Pecker: Bug Localization Framework for Sequential Designs via Causal Chain Reconstruction
Jiaping Tang, Jianan Mu, Tianyun Ma +3
Taming Process Variations in CNFET for Efficient Last Level Cache Design
Dawen Xu, Zhuangyu Feng, Cheng Liu +5
ApproxPilot: A GNN-based Accelerator Approximation Framework
Qing Zhang, Cheng Liu, Siting Liu +3
Fast Exact NPN Classification with Influence-aided Canonical Form
Yonghe Zhang, Liwei Ni, Jiaxi Zhang +3
RIROS: A Parallel RTL Fault SImulation FRamework with TwO-Dimensional Parallelism and Unified Schedule
Jiaping Tang, Jianan Mu, Zizhen Liu +6
Arcane: An Assertion Reduction Framework through Semantic Clustering and MCTS-Guided Rule Exploring
Hongqin Lyu, Yonghao Wang, Zhiteng Chao +2
ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy
Jiaping Tang, Jianan Mu, Silin Liu +8
Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions
Jiaxi Zhang, Shenggen Zheng, Liwei Ni +2
OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesis
Liwei Ni, Rui Wang, Miao Liu +10
From Buffers to Registers: Unlocking Fine-Grained FlashAttention with Hybrid-Bonded 3D NPU Co-Design
Jinxin Yu, Yudong Pan, Mengdi Wang +4
Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures
Zizhen Liu, Fangzhiyi Wang, Mengdi Wang +4
DeepAssert: An LLM-Aided Verification Framework with Fine-Grained Assertion Generation for Modules with Extracted Module Specifications
Yonghao Wang, Jiaxin Zhou, Hongqin Lyu +3
DHSA: Efficient Doubly Homomorphic Secure Aggregation for Cross-silo Federated Learning
Zizhen Liu, Si Chen, Jing Ye +3
CoverAssert: Iterative LLM Assertion Generation Driven by Functional Coverage via Syntax-Semantic Representations
Yonghao Wang, Yang Yin, Hongqin Lyu +8
Statistical Modeling of Soft Error Influence on Neural Networks
Haitong Huang, Xinghua Xue, Cheng Liu +5
SigDLA: A Deep Learning Accelerator Extension for Signal Processing
Fangfa Fu, Wenyu Zhang, Zesong Jiang +8
AssertGen: Enhancement of LLM-aided Assertion Generation through Cross-Layer Signal Bridging
Hongqin Lyu, Yonghao Wang, Yunlin Du +5
An Efficient Fault-Tolerance Scheme for CKKS Computation on CPUs
Jianan Mu, Ge Yu, Tenghui Hua +6
SPFL: A Self-purified Federated Learning Method Against Poisoning Attacks
Zizhen Liu, Weiyang He, Chip-Hong Chang +3
Faver: Boosting LLM-based RTL Generation with Function Abstracted Verifiable Middleware
Jianan Mu, Mingyu Shi, Yining Wang +5
Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation
Xinmiao Zhang, Zheng Feng, Shengwen Liang +4
AssertFix: Empowering Automated Assertion Fix via Large Language Models
Hongqin Lyu, Yunlin Du, Yonghao Wang +3
HLSPilot: LLM-based High-Level Synthesis
Chenwei Xiong, Cheng Liu, Huawei Li +1
From Large to Small: Transferring CUDA Optimization Expertise via Reasoning Graph
Junfeng Gong, Zhiyi Wei, Junying Chen +2
InF-ATPG: Intelligent FFR-Driven ATPG with Advanced Circuit Representation Guided Reinforcement Learning
Bin Sun, Rengang Zhang, Zhiteng Chao +4
Harvesting AI Computation at the Edge via Generic Approximation
Yihan Wang, Huiru Yan, Luxin Zhang +6
Adaptive Reconvergence-driven AIG Rewriting via Strategy Learning
Liwei Ni, Zonglin Yang, Jiaxi Zhang +4
Soft Error Reliability Analysis of Vision Transformers
Xinghua Xue, Cheng Liu, Ying Wang +5
On the Vulnerability of FHE Computation to Silent Data Corruption
Jianan Mu, Ge Yu, Zhaoxuan Kan +6
PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System
Yintao He, Haiyu Mao, Christina Giannoula +6